3 edition of A hardware implementation of a provably correct design of a fault-tolerant clock synchronization circuit found in the catalog.
A hardware implementation of a provably correct design of a fault-tolerant clock synchronization circuit
by National Aeronautics and Space Administration, Langley Research Center, National Technical Information Service, distributor in Hampton, Va, [Springfield, Va
Written in English
|Series||NASA technical memorandum -- 109001.|
|Contributions||Langley Research Center.|
|The Physical Object|
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